In signal processing apparatus, a DC voltage offset from an ideal value in a signal path can be disadvantageous because it can reduce the dynamic range available for a signal, and it can reduce power efficiency due to the flow of DC currents. A DC voltage can also cause transient noise when a quiescent DC voltage is established after a power supply to a signal processing apparatus is switched on, and when the quiescent DC voltage decays after the power supply is switched off. Therefore, there is a requirement to reduced DC offset and DC voltage and current in signal processing apparatus.
A calibration arrangement may be employed in which a DC level in a signal processing apparatus is measured and, in response to the measured DC level, the DC level in the signal processing apparatus is adjusted to reduce its offset from a desired value. If the DC level is measured at the output of the signal processing apparatus, then a prerequisite is that power has been applied, and consequently transient noise may have been generated and passed to other equipment coupled to the signal processing apparatus. Alternatively, if the DC level is measured at an earlier stage of the signal path, any DC offset in a subsequent stage or stages is not taken into account during the calibration process, resulting in a residual DC offset at the output of the signal processing apparatus. In either case, in order to avoid introducing an inaccuracy to the measurement, a measurement device having a very low DC offset is used, and such a measurement device can occupy a large silicon area and reduce power efficiency. Also, trials with sensitive audio headsets have shown that, in audio signal processing apparatus, a step in DC level as small as 100 μV can generate audible noise. Therefore, noise can be generated during calibration.
Therefore, there is a requirement for improved calibration of signal processing apparatus.